8.13.4.1 Other instruction support (pseudo-instructions)

• Load large immediate into general register:

  The pseudo-instruction mov imm,%rn (where the immediate does not fit within a signed 16-bit field) will be expanded into:

  orh large_imm@h,%r0,%rn or large_imm@l,%rn,%rn

• Load/store with relocatable address expression:

  For example, the pseudo-instruction ld.b addr,%rn will be expanded into:

  orh addr_exp@ha,%r0,%r31 ld.l addr_exp@l(%r31),%rn

  The analogous expansions apply to ld.x, st.x, fld.x, pfld.x, fst.x, and pst.x as well.

• Signed large immediate with add/subtract:

  If any of the arithmetic operations adds, addu, subs, subu are used with an immediate larger than 16-bits (signed), then they will be expanded. For instance, the pseudo-instruction adds large_imm,%rx,%rn expands to:

  orh large_imm@h,%r0,%r31 or large_imm@l,%r31,%r31 adds %r31,%rx,%rn

• Unsigned large immediate with logical operations:

  Logical operations (or, andnot, or, xor) also result in expansions. The pseudo-instruction or large_imm,%rx,%rn results in:

  orh large_imm@h,%rx,%r31 or large_imm@l,%r31,%rn

  Similarly for the others, except for and which expands to:

  andnot (-1 - large_imm)@h,%rx,%r31 andnot (-1 - large_imm)@l,%r31,%rn